1. Field of the Invention
The present invention relates to a semiconductor storage device and a driving method thereof.
2. Related Art
Recently, there is an FBC (Floating Body Cell) memory device as a semiconductor storage device expected to be an alternative to a 1T (Transistor)-1C (Capacitor) type DRAM. The FBC memory device is formed by FET (Field Effect Transistor) including a floating body (hereinafter referred to as body) on an SOI (Silicon On Insulator) substrate. In the FBC memory device, data “1” or data “0” is stored according to the number of majority carriers accumulated in the body.
A bipolar write type FBC memory (hereinafter sometimes referred to as bipolar FBC) has been developed to enables efficient data write (see JP-A 2005-79314 (KOKAI)). The bipolar FBC includes a drain layer and an emitter layer constituting a pn-junction. Therefore, the bipolar transistor includes the emitter layer, the drain layer, and the body. In writing data, the bipolar transistor is driven to accumulate a charge in the body.
However, in the memory disclosed in JP-A 2005-79314 (KOKAI), because the data is selectively written, it is necessary to provide the emitter layer in each bit line (in each column). That is, in memory cells adjacent in a bit line direction (in a column direction), the emitter layer cannot be shared, but the emitter layer is provided in each column. Therefore, unfortunately a large occupation area of each memory cell increases dimensions of the whole of the memory device.
In a memory disclosed in U.S. patent application Laid-open No. 2006-181919, a memory bipolar transistor includes an emitter layer, a bulk substrate, and a body. In order to prevent short-circuit between a drain layer and the bulk substrate, the body (n-type well) is largely diffused, whereby the drain layer is covered with the body. Accordingly, in U.S. patent application Laid-open No. 2006-181919, use of the bulk substrate is required, and the emitter layer is not adjacent to the drain layer and a source layer. When the emitter layer is separated from the drain layer and source layer, the dimensions of the memory cell are increased.